1. Field of the Invention
The present invention relates to an image sensor and, more particularly, to a high-sensitivity image sensor embodied on a silicon-on-insulator (hereinafter referred to as “SOI”), achieving a high sensitivity and a high degree of integration.
2. Background of the Related Art
Referring to FIG. 1a, an image sensor generally has stacked structure comprising a P-type silicon substrate 1 and an N-type silicon substrate 2 formed by epitaxial growth. The stacked structure also includes a photodiode 3 and a bipolar transistor 4 that functions as a circuit for processing a signal produced from the photodiode 3. The N-type silicon substrate is divided into plural regions by P-type buried diffusion layers 5. The photodiode 3 and the bipolar transistor 4 are provided in or on the plural regions of the N-type silicon substrate.
The photodiode 3 is constructed by using a PN junction that is an interface between the P-type silicon substrate 1 and the N-type silicon substrate 2. The bipolar transistor 4 has a P-type diffusion layer in the upper part of the N-type silicon substrate 2. An N+-type diffusion layer 7 is placed from the surface of the N-type silicon substrate 2 to the upper part of the P-type silicon substrate 1.
An oxide layer 6 is provided on the entire surface of the N-type silicon substrate 2. For the bipolar transistor, metal interconnects are connected to the N+-type diffusion layer 7, and the P-type diffusion layer. The photosensitivity of this type of the photodiode depends on the photosensitivity of the PN junction as well as the absorption amount influenced by the size and the thickness of the photodiode.
FIG. 1b is a cross-sectional view illustrating an image sensor on an SOI wafer. The SOI wafer comprises a P-type silicon substrate 11 and an N-type silicon substrate 12 under which an N-type diffusion layer 19 is placed. An oxide layer 13 is positioned between the P-type silicon substrate 11 and the N-type diffusion layer 19.
The N-type silicon substrate 12 is divided into plural regions by trench-type isolation layers 14. A photodiode 15 and a bipolar transistor 16 are provided in or on the plural regions of the N-type silicon substrate 12. The trench-type isolation layers 14 extend from an oxide layer 17 positioned on the N−type silicon substrate 12 to the upper part of the oxide layer 13.
For the photodiode 15, a P-type diffusion layer which acts as an active layer, is positioned near the surface of the N-type silicon substrate 12. An N+-type diffusion layer 18 extends from the surface of N-type silicon substrate 12 to the N-type diffusion layer 19.
A conventional CMOS image sensor using a bulk silicon substrate has a technical limitation in terms of the improvement of sensitivity and a noise characteristic, and the possibility that light-excited carriers can be created in undesirable region by light irradiation always remains. Furthermore, a presence of parasitic stray capacitance causes an increment of a noise and the degradation of operation speed, so that a characteristic of the sensor is deteriorated. In detail, for the CMOS image sensor using a bulk silicon substrate, a dark current component, which is a type of leakage current generated when a depletion region of an intrinsic semiconductor is formed toward the substrate, works as a noise component of a photo-current. Such a characteristic decreases sensitivity of the sensor and a response speed of the photo-current, so that a response speed to an incoming image gets to fall.
Moreover, for the CMOS image sensor using a conventional SOI substrate, an epitaxial silicon layer placed on a buried oxide layer is so thin that an operation of a high voltage transistor is difficult.